Analog Design Engineer

Company: YO IT CONSULTING
Location: Austin
Posted on: February 15, 2026

Job Description:

Job Description Job Description Experience: 7 - 15 Years Location: Austin, Texas Mandatory Requirement: 5 years (or equivalent) of analog / mixed-signal IC design experience, including complex high-speed blocks such as DACs, ADCs, PLLs, SerDes-related analog, high-speed timing circuits, phase interpolators, etc., with top-level/system understanding. Experience designing in advanced process nodes such as FinFET and/or GAA. Meaningful industry tapeout exposure and familiarity with signoff/tapeout procedures (strong preference for being around a couple of tapeouts). Proficiency with Cadence custom/analog design tools (Virtuoso / ADE) and Spectre. Hands-on design experience must be silicon IC design (on-chip RF/AMS). (Note: PCB / antenna-only RF backgrounds are not a fit for this role) B.S. in Electrical Engineering / Computer Engineering (or equivalent) required. Ability to work on-site in Austin, TX, 5 days a week. About the Role Build the analog front-end (AFE) that interfaces a next-generation coherent optical DSP with optical modules. This is cutting-edge analog/RF/mixed-signal IC design at extreme bandwidths and tight performance margins in advanced technology nodes (FinFET / GAA). This role sits within the growing Austin, TX team (a key nucleus of our broader analog organization) Responsibilities Design and deliver high-speed analog/mixed-signal/RF silicon circuits enabling wideband TX/RX chains (DAC/ADC-based AFE for coherent optical). Own block execution end-to-end: participate in/challenge spec definition, explore architectures/topologies, and drive circuit implementation in advanced nodes. Develop ultra-wideband building blocks (e.g., wideband amplifiers/drivers and other high-speed analog circuits) to meet aggressive requirements for bandwidth, linearity, noise, and power. Partner closely with layout/physical design to guide implementation for high-speed, low-noise performance; run post-layout optimization and close on signoff-quality results. Integrate blocks into the full analog system and support tapeout/signoff readiness through reviews, documentation, and cross-site collaboration. Must Haves 5 years (or equivalent) of analog / mixed-signal IC design experience, including complex high-speed blocks such as DACs, ADCs, PLLs, SerDes-related analog, high-speed timing circuits, phase interpolators, etc., with top-level/system understanding. Experience designing in advanced process nodes such as FinFET and/or GAA. Meaningful industry tapeout exposure and familiarity with signoff/tapeout procedures (strong preference for being around a couple of tapeouts). Proficiency with Cadence custom/analog design tools (Virtuoso / ADE) and Spectre. Hands-on design experience must be silicon IC design (on-chip RF/AMS). PCB / antenna-only RF backgrounds are not a fit for this role. Nice to Haves Direct experience in high-speed DAC design (especially TX path) and/or high-speed ADC interface design. Demonstrated success designing ultra-wideband amplifiers/drivers in scaled nodes. Verilog-A and/or MATLAB modeling experience. Strong communication, collaboration, and ownership mindset in a fast-moving, cross-site environment. Education B.S. in Electrical Engineering / Computer Engineering (or equivalent) required. M.S. / PhD is a plus; we consider equivalent combinations of education and industry impact (e.g., deeper tapeout experience can offset less graduate education).

Keywords: YO IT CONSULTING, Killeen , Analog Design Engineer, Engineering , Austin, Texas